By Panagiotis Dimitrakis
This ebook describes the fundamental applied sciences and operation ideas of charge-trapping non-volatile stories. The authors clarify the machine physics of every gadget structure and supply a concrete description of the fabrics concerned in addition to the basic houses of the expertise. sleek fabric houses used as charge-trapping layers, for brand spanking new functions are introduced.
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Additional info for Charge-Trapping Non-Volatile Memories: Volume 1 – Basic and Advanced Devices
1998) Okuyama et al. (1998) Ho et al. (2008) Prall et al. (2010), Prall (2007) Prall et al. (2010), Prall (2007) Torsi (2011)) Prall et al. (2010) Reid et al. (2009), Asenov et al. (2001, 2003) Kurata et al. (2007), Bae et al. (2009) Compagnoni et al. (2008) Prall et al. (2010) Liu et al. (2009) Lee (2004) Mielke et al. (2006) Okuyama et al. (1998) Lee (2004), Mielke et al. (2006), Belgal et al. (2002) Wang et al. (2009) Kim (2010) Kurata et al. (2007), Bae et al. (2009), Tega et al. (2006) Prall et al.
Many planar NAND cell options have been discussed in the literature (Muralidhar et al. 2003; Park et al. 2006; Waser 2008; Torsi 2011). These have predominantly been of the nature of nitride or nanocrystal charge trap cell, though some work has been reported on thin conductive floating gate cells as well. The perceived advantage of nitride or nanocrystal charge storage was that the discrete nature of the charge storage could help make the cell more immune to localized charge loss issues such as those stemming from oxide defects including Stress Induced Leakage Current (SILC) (Okuyama et al.
21 Plot of (a) the energy band-gap vs. dielectric constant and (b) the related energy barriers for electrons and holes with respect to Si (Southwick 2011) As the technology of the tools for the deposition of ultrathin dielectric layers improves, the band-engineering of tunneling dielectric gained a lot of interest in CTM manufacturing. In this direction, a band-engineered (BE) dielectric stack made of ONO replaced successfully the single TOX layer in SONOS devices (Lue 2005; Lai et al. 2007). The new CTM cell architecture is shown in Fig.